The company appears well positioned to challenge CPU incumbents with high performance RISC-V CPUs and Vector Extensions to the open ISA architecture. The RISC-V CPU Instruction Set Architecture (ISA) ...

The computing industry has reached a significant milestone with the ratification of the 1.0 RISC-V Vector Specification. This development marks the beginning of a new era in computing efficiency, as ...

San Jose, CA, Nov. 06, 2020 (GLOBE NEWSWIRE) -- Andes Technology Corporation (TWSE: 6533), a leading supplier of high efficiency, low-power 32/64-bit RISC-V processor cores and founding Premier member ...

Though the RISC-V Summit North America is over, you can peruse the videos of most of the keynotes and sessions here. The list is quite long, so we picked a few and included them in this space, such as ...

A search is underway across the industry to find the best way to speed up machine learning applications, and optimizing hardware for vector instructions is gaining traction as a key element in that ...

The technology driving our world today is increasingly complex. From the latest flashy AI technology like ChatGPT to autonomous cars and satellite launches to the innovations behind our everyday ...

Why Synopsys’ entry into the RISC-V field is significant. What RISC-V families are supported by Synopsys. Synopsys just released its ARC-V family of RISC-V-based processors (see figure). Those ...

Embedded world 2022 was the place to be for the latest RISC-V developments. Innovations ranged from Think Silicon’s first RISC-V–based GPU, targeting 32-bit SoCs, to the OpenHW Group’s new open-source ...

We’ve heard the story before. I was a proponent of it in the late 1990s, with the ‘first fully configurable’ processor core. So, did we already experience the ‘first’ one many years ago, or was the ...

For those not immediately familiar with RISC-V, it is a relatively new CPU architecture which takes advantage of Reduced Instruction Set Computer (RISC) principles. RISC-V is an open standard ...